PERFORMANCE-OPTIMAL PHASE-LOCKED SYSTEM FOR DEVICE OF SYNCHRONIZATION AND FORMATION OF THE EXACT TIME SIGNALS

D. Kalian
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引用次数: 1

Abstract

Background. The generating reference time signals problem to meet the all consumers’ requirements for time and frequency information is targeted on researching the time scale IP-technologies transmission systems quality improvement and optimizing the synchronization devices self-tuning, as one of the most common systems’ elements in a today’s world. Objective. The aim of the paper is the phase locked loop (PLL) system performance optimization of the device for the exact time signal synchronization and formation. Methods. The linearized model construction of a closed automatic control system for a synchronization device, obtaining performance optimal control law in an analytical form and its implementation in the synchronization device PLL system using an adaptive digital phase discriminator. Results. The performance optimal control law in synchronization PLL device using an adaptive digital phase discriminator was practically implemented. Conclusions. The synchronization information transmission over existing IP networks based on the PTP protocol allows spreading the time scale with an accuracy of hundreds nanoseconds in real networks. Improving the exact time signals formation quality causes the optimizing performance need for the PLL synchronization devices. The adaptive digital phase discriminator use is protected by the Ukraine invention patent and provides the ability to control the phase discriminator (PD) characteristic shape for the transient process duration in PLL system. Keywords: standard; exact time; self-tuning; optimization; synchronization; control system; IP-technologies.
性能最优的锁相系统,用于同步装置和精确时间信号的形成
背景。为满足所有用户对时间和频率信息的要求而产生参考时间信号的问题是针对时间尺度ip技术进行传输系统质量改进和同步装置自调谐优化的研究,是当今世界上最常见的系统要素之一。目标。本文的目的是对锁相环(PLL)系统的性能进行优化,以实现精确的时间信号同步和形成。方法。建立了同步装置封闭自动控制系统的线性化模型,得到了解析形式的性能最优控制律,并利用自适应数字鉴相器在同步装置锁相环系统中实现。结果。应用自适应数字鉴相器实现了同步锁相环器件的性能最优控制律。结论。在现有的基于PTP协议的IP网络上进行同步信息传输,可以在实际网络中以数百纳秒的精度扩展时间尺度。精确时间信号形成质量的提高导致锁相环同步器件的性能优化需求。自适应数字鉴相器的使用受到乌克兰发明专利的保护,并提供了在锁相环系统中控制暂态过程持续时间鉴相器(PD)特征形状的能力。关键词:标准;确切的时间;自调优;优化;同步;控制系统;ip技术等领域。
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