Component placement for improved EMI performance in power electronic circuits

M. Joshi, V. Agarwal
{"title":"Component placement for improved EMI performance in power electronic circuits","authors":"M. Joshi, V. Agarwal","doi":"10.1109/APEC.1998.654006","DOIUrl":null,"url":null,"abstract":"Casual placement of components in power electronic circuits can lead to unpredictable EMI problems in the hardware which are hard to troubleshoot. At certain power levels and operating frequencies, various segments of a circuit might act as antennas radiating noise. The design engineer ends up inserting shields in the circuit to somehow make the circuit work. Precautions at the time of initial circuit layout can save time and efforts. Extensive computer simulation and experimentation have been carried out to highlight some of these issues with an aim of providing appropriate guidelines, which, if observed, can minimize EMI problems.","PeriodicalId":156715,"journal":{"name":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.1998.654006","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7

Abstract

Casual placement of components in power electronic circuits can lead to unpredictable EMI problems in the hardware which are hard to troubleshoot. At certain power levels and operating frequencies, various segments of a circuit might act as antennas radiating noise. The design engineer ends up inserting shields in the circuit to somehow make the circuit work. Precautions at the time of initial circuit layout can save time and efforts. Extensive computer simulation and experimentation have been carried out to highlight some of these issues with an aim of providing appropriate guidelines, which, if observed, can minimize EMI problems.
改善电力电子电路中电磁干扰性能的元件放置
在电力电子电路中随意放置元件可能导致硬件出现不可预测的EMI问题,而这些问题很难排除故障。在一定的功率水平和工作频率下,电路的不同部分可能像天线一样辐射噪声。设计工程师最终在电路中插入屏蔽以使电路工作。初次布线时的注意事项,可节省时间和精力。已经进行了广泛的计算机模拟和实验,以突出其中一些问题,目的是提供适当的准则,如果遵守这些准则,可以尽量减少电磁干扰问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信