Temperature sensitivity to node spacing in ASTAP finite difference modelling for flat cap single- and multi-chip modules

Abstract

Examines the sensitivity of ASTAP (Advanced Statistical Analysis Program) chip temperatures to model mesh size (node spacing) for flat cap single- and multichip modules and develops guidelines for mesh size selection which ensure a certain level of model accuracy without wasting resources with unnecessary model complication. Temperature output from models generated with the ASTAP model preprocessor (AMP) are first verified against the results from a finite-element modeling package. ASTAP chip temperatures as a function of node spacing are plotted. Optimum node spacing is determined as being where chip temperature variability decreases below the order of a user-defined value for all chips on a module. Guidelines are recommended for the most efficient mesh size selection as a function of module size, maximum chip power density, and maximum vertical chip attach 1D thermal resistances on the module.<>