Sequential design of FIR digital filters for low-power DSP applications

Abstract

A method for the design of FIR digital filters with low power consumption is proposed. In this method, the digital filter is implemented as a cascade arrangement of low-order sections. The first section is designed through optimization so as to satisfy as far as possible, the overall required specifications. The first section is then fixed and a second section is added, which is designed so that the first two sections in cascade satisfy again as far as possible the overall required specifications. This process is repeated until a multisection filter is obtained that would satisfy the required specifications under the most critical circumstances imposed by the application at hand. In multisection filters of this type, the minimum number of sections required to process the current input signal can be switched in through the use of a simple adaptation mechanism and, in this way, the power consumption can be minimized. This design strategy is achieved by formulating the design of the k-th section as a weighted least-squares minimization problem, assuming that an optimum (k-1)-section design is available.