Thermal Modeling for System-in-a-Package Based on Embedded Chip Structure

Abstract

This paper presents a thermal modeling for a new packaging concept, known as system-in-a-package, in which embedded chip technology is used. This structure fulfills the requirements for high integration and high density, while at the same time, would expect to be poor thermal performance because of the encapsulation on the chip. Thermal modeling here aims to give the first insight to characterize the thermal performance for such structure under steady and transient condition. It shows that substrates with good thermal conductivity help to keep the temperature on the chip at a reasonable level. For poorly conductive substrates, heat only conduct through copper tracks. Epoxy around the chip also plays an important role when the thermal conductivity of the substrate is good but is of less importance when the substrate has poor conductivity. The thickness of copper had large influence on the thermal resistance, while the thickness of chip does not effect at all. The thermal resistance is reduced considerably when the air velocity is increased.