Self adaptive body biasing scheme for leakage power reduction in nanoscale CMOS circuit

Jing Yang, Yong-Bin Kim
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引用次数: 6

Abstract

This paper presents techniques to determine the optimal reverse body bias (RBB) voltage to minimize leakage currents in modern nanoscale CMOS technology. The proposed self-adaptive RBB system finds the optimum reverse body bias voltage for minimal leakage power adaptively by comparing subthreshold leakage current (ISUBTH), gate tunneling leakage (IGATE), and band-to-band tunneling leakage currents (IBTBT) in standby mode. The proposed circuit has been designed and tested using 65nm bulk CMOS technology at 25ºC under a supply voltage of less than 1V. The optimal RBB was achieved at -0.372V with 1.2% error in the test case of the paper, and the simulation result shows that it is possible to reduce the total leakage current significantly as much as 86% of the total leakage using the proposed circuit techniques.
纳米级CMOS电路中自适应体偏置降低漏功率的方案
本文介绍了在现代纳米级CMOS技术中确定最佳反体偏置(RBB)电压以减小漏电流的技术。本文提出的自适应RBB系统通过比较待机状态下的亚阈值泄漏电流(ISUBTH)、栅极隧道泄漏电流(IGATE)和带间隧道泄漏电流(IBTBT),自适应地找到泄漏功率最小的最佳反向体偏置电压。该电路采用65nm体CMOS技术,在25ºC和小于1V的电源电压下进行了设计和测试。在本文的测试用例中,最佳RBB在-0.372V时达到,误差为1.2%,仿真结果表明,使用所提出的电路技术可以显着降低总泄漏电流,最多可减少总泄漏电流的86%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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