{"title":"Near threshold cloud processors for dark silicon mitigation: the impact on emerging scale-out workloads","authors":"Jing Wang, Junwei Zhang, Wei-gong Zhang, Keni Qiu, Tao Li, Minhua Wu","doi":"10.1145/2742854.2742878","DOIUrl":null,"url":null,"abstract":"The breakdown of Dennard scaling has made computing energy limited and therefore restricts the performance and brings rise to dark silicon. To effectively leverage the advantage of increased number of transistors and alleviate the dark silicon problem, designers consider a set of design paradigms in the processor manufacturing. Among those, Near - Threshold Voltage Computing (NTC) is a promising candidate. However, prior efforts largely focus on a specific design option based on legacy desktop applications, lacking comprehensive analysis of emerging scale-out applications with multiple design options. In this paper, we characterize different perspectives including performance and energy efficiency in the context of NTC cloud processors by running emerging scale-out workloads. We find NTC can improve performance by 1.6X, and improve energy efficiency by 50%. Meanwhile, we also show that tiled-OoO architecture improve performance of scale-out workloads upto 3.7X and energy efficiency upto 6X over alternative chip organizations, making it a preferable design paradigm for scale-out workloads. We believe that our observations will provide insights for the design of cloud processors in the era of dark silicon.","PeriodicalId":417279,"journal":{"name":"Proceedings of the 12th ACM International Conference on Computing Frontiers","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 12th ACM International Conference on Computing Frontiers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2742854.2742878","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The breakdown of Dennard scaling has made computing energy limited and therefore restricts the performance and brings rise to dark silicon. To effectively leverage the advantage of increased number of transistors and alleviate the dark silicon problem, designers consider a set of design paradigms in the processor manufacturing. Among those, Near - Threshold Voltage Computing (NTC) is a promising candidate. However, prior efforts largely focus on a specific design option based on legacy desktop applications, lacking comprehensive analysis of emerging scale-out applications with multiple design options. In this paper, we characterize different perspectives including performance and energy efficiency in the context of NTC cloud processors by running emerging scale-out workloads. We find NTC can improve performance by 1.6X, and improve energy efficiency by 50%. Meanwhile, we also show that tiled-OoO architecture improve performance of scale-out workloads upto 3.7X and energy efficiency upto 6X over alternative chip organizations, making it a preferable design paradigm for scale-out workloads. We believe that our observations will provide insights for the design of cloud processors in the era of dark silicon.