Design considerations for a DC-DC Boost Converter in standard CMOS technology

Abstract

In this paper, the challenges of designing a boost converter in standard CMOS technology are discussed. Based on theoretical calculations, which take into consideration the characteristics of the technology used, efficient solutions are proposed to overcome the current-stress limitations as well as the power dissipation issues. Following these guidelines, a test DC-DC converter, designed and fabricated in a standard 0.18um CMOS process is presented, along with experimental results.