Opportunistic redundancy for improving reliability of embedded processors

Abstract

The downscaling of technology features has brought the system developers an important design criteria, reliability, into prime consideration. Among reliability concerns, transient fault caused by external radiation effects and temperature gradients is becoming a significant factor for the erroneous execution of embedded processors. State-of-the-art reliability-aware design techniques for embedded processors are yet to take complete advantage of the instruction set and application knowledge. In this work, we present reliability protection techniques for embedded processors which opportunistically take advantage of the hardware redundancy. Several policies based on the reliability requirements from the applications are introduced to explore the reliability-performance trade-off. The efficiency of proposed techniques are demonstrated by using several embedded processors.