Copper distribution behavior near a SiO/sub 2//Si interface by low-temperature (<400/spl deg/C) annealing and its influence on electrical characteristics of MOS-capacitors

Abstract

The Cu redistribution behavior near a SiO/sub 2//Si interface after low temperature annealing is examined by using total reflection of X-ray fluorescence (TXRF) to simulate the effect of thermal budget in multi-level wiring processes. Cu atoms intentionally adsorbed on backside of the wafers were diffused and were once gettered at the gettering sites during high-temperature drive-in diffusion. However, after low-temperature annealing following the drive-in diffusion, Cu concentration of the Si surface was found to increase even in CZ wafers with intrinsic gettering process (IG). Cu atoms gettered in the vicinity of the SiO/sub 2//Si interface after drive-in diffusion are found to readily transport through the SiO/sub 2/ film and reach the SiO/sub 2/ surface during 400/spl deg/C annealing. This transport of Cu is found to cause degradation of thin SiO/sub 2/ film. The redistribution phenomenon during low-temperature annealing should be carefully controlled in order to realize highly reliable CMOS devices.