Power electronics packaging and miniature using chip-scale packaged power devices

Xingsheng Liu, G. Lu
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引用次数: 7

Abstract

The authors present a power electronics packaging technology utilizing chip-scale packaged (CSP) power devices to build three-dimensional integrated power electronics modules (IPEMs). The chip-scale packaging structure, termed Die Dimensional Ball Grid Array (D/sup 2/BGA), eliminates wire bonds by using stacked solder bumps to interconnect power chips. It has the same lateral dimensions as the starting power chip, which makes high-density packaging and module miniaturisation possible. This package enables the power chip to combine excellent thermal transfer, high current handling capability, improved electrical characteristics, and ultra-low profile packaging. In this paper, the authors introduce the D/sup 2/BGA power chip-scale package, and present the implementation of these chip-scale packaged power devices in building 30 kW half-bridge power converter modules. The electrical and reliability test results of the packaged devices and the power modules are reported.
电力电子封装和微型化使用芯片级封装功率器件
提出了一种利用芯片级封装(CSP)功率器件构建三维集成电力电子模块(IPEMs)的电力电子封装技术。这种芯片级封装结构被称为Die Dimensional Ball Grid Array (D/sup 2/BGA),通过使用堆叠的焊料凸起来互连电源芯片,从而消除了线键。它具有与启动电源芯片相同的横向尺寸,这使得高密度封装和模块小型化成为可能。这种封装使功率芯片能够结合出色的热传递,高电流处理能力,改进的电气特性和超低的封装。本文介绍了D/sup 2/BGA芯片级封装功率器件,并给出了这些芯片级封装功率器件在构建30kw半桥功率转换器模块中的实现。报告了封装器件和电源模块的电气性能和可靠性测试结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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