3D recursive Gaussian IIR on GPU and FPGAs — A case for accelerating bandwidth-bounded applications

J. Cong, Muhuan Huang, Yi Zou
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引用次数: 11

Abstract

GPU device typically has a higher off-chip bandwidth than FPGA-based systems. Thus typically GPU should perform better for bandwidth-bounded massive parallel applications. In this paper, we present our implementations of a 3D recursive Gaussian IIR on multi-core CPU, many-core GPU and multi-FPGA platforms. Our baseline implementation on the CPU features the smallest arithmetic computation (2 MADDs per dimension). While this application is clearly bandwidth bounded, the difference on the memory subsystems translates to different bandwidth optimization techniques. Our implementations on the GPU and FPGA platforms show 26X and 33X speedup respectively over optimized single-thread code on CPU.
GPU和fpga上的三维递归高斯IIR -一个加速带宽限制应用的案例
GPU设备通常比基于fpga的系统具有更高的片外带宽。因此,通常GPU应该在带宽有限的大规模并行应用程序中表现更好。本文介绍了在多核CPU、多核GPU和多fpga平台上实现三维递归高斯IIR的方法。我们在CPU上的基线实现具有最小的算术计算(每个维度2个madd)。虽然这个应用程序明显有带宽限制,但内存子系统的差异转化为不同的带宽优化技术。我们在GPU和FPGA平台上的实现分别比CPU上优化的单线程代码加速了26X和33X。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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