{"title":"An Efficient Algorithm for the VLSI Implementation of Inverse DCT Based on Quasi-Circular Correlation Structures","authors":"D. Chiper, L. Cotorobai","doi":"10.1109/TELSIKS52058.2021.9606373","DOIUrl":null,"url":null,"abstract":"This paper proposes a new VLSI algorithm for a inverse discrete cosine transform (IDCT) designed for an efficient implementation of the obfuscation technique. The proposed algorithm is using quasi-circular correlation structures and is highly regular and modular. The method presents a low hardware complexity, a high throughput and it can be mapped using a low number of I/O channels which in turn translates to a low bandwidth on linear systolic arrays. Additionally, most of the parts of the architecture are working at a significantly lower frequency than the main systolic array. Using the time-varying obfuscation method, the proposed algorithm presents the additional advantage in the field of hardware security and it can be efficiently implemented on a VLSI chip with a low power consumption due to its low hardware complexity.","PeriodicalId":228464,"journal":{"name":"2021 15th International Conference on Advanced Technologies, Systems and Services in Telecommunications (TELSIKS)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 15th International Conference on Advanced Technologies, Systems and Services in Telecommunications (TELSIKS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TELSIKS52058.2021.9606373","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper proposes a new VLSI algorithm for a inverse discrete cosine transform (IDCT) designed for an efficient implementation of the obfuscation technique. The proposed algorithm is using quasi-circular correlation structures and is highly regular and modular. The method presents a low hardware complexity, a high throughput and it can be mapped using a low number of I/O channels which in turn translates to a low bandwidth on linear systolic arrays. Additionally, most of the parts of the architecture are working at a significantly lower frequency than the main systolic array. Using the time-varying obfuscation method, the proposed algorithm presents the additional advantage in the field of hardware security and it can be efficiently implemented on a VLSI chip with a low power consumption due to its low hardware complexity.