Nano scaled low power leakage st-based SRAM

Abstract

The main purpose of this paper work is to reduce leakage power and to produce stable output at lower supply voltages for SRAM circuits in 180*10-9m. Generally the power dissipation in conventional SRAM circuits will be high. In order to overcome that problem, a new SRAM circuit based on Schmitt trigger (ST) is introduced which consumes very less power than conventional SRAMs. Here SOI-DTMOS (Silicon on insulator-dynamic threshold MOS) are utilized in order to have low supply voltage and stability during operations.