A 1.2V Fully Differential Amplifier with Buffered Reverse Nested Miller and Feedforward Compensations

M. Shen, Li-Han Hung, Po-Chiun Huang
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引用次数: 11

Abstract

This paper presents a low voltage CMOS fully differential operational amplifier. It comprises three gain stages with two compensation schemes, buffered reverse nested Miller compensation (B-RNMC) and feedforward transconductance compensation (FFTC). In B-RNMC, a transconductance stage is inserted in the feedback path to eliminate the right half plane (RHP) zero which may degrade phase margin. In FFTC, a feedforward transconductance helps to enhance output large signal response. Using standard 0.35-mum CMOS technology, measurement results demonstrate that DC gain greater than 90 dB, gain-bandwidth product of 8.9 MHz, and phase margin of 86deg is achieved with lOOpF output loads. The settling time for a 1.2 Vpp step is 2.4 mus. All the circuits dissipate 342 muW under a single 1.2V power supply.
一个1.2V全差分放大器与缓冲反向嵌套米勒和前馈补偿
本文介绍了一种低压CMOS全差分运算放大器。它包括三个增益级和两种补偿方案,缓冲反向嵌套米勒补偿(B-RNMC)和前馈跨导补偿(FFTC)。在B-RNMC中,在反馈路径中插入一个跨导级,以消除可能降低相位裕度的右半平面(RHP)零点。在FFTC中,前馈跨导有助于增强输出大信号响应。采用标准的0.35 μ m CMOS技术,测量结果表明,在环路输出负载下,直流增益大于90 dB,增益带宽积为8.9 MHz,相位裕度为86度。1.2 Vpp步骤的稳定时间为2.4 mus。在单个1.2V电源下,所有电路的功耗为342 muW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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