An Enhanced Expandable Multilevel Inverter Topology with High Number of Levels per Number of Components

K. Varesi, F. Esmaeili
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引用次数: 6

Abstract

This paper proposes an enhanced basic 31-level inverter topology that can be expanded for achieving increased levels. The suggested basic topology is consisted of 4 input DC sources and 12 power switches. The magnitude of DC sources are selected in binary manner to minimize the redundant states and maximize the number of distinct voltage levels. The modular and simple structure, low average of voltages stress on switches, suitability for resistive-inductive load type as well as increased levels per device count (DC input sources, power switches and gate driver circuits) are the main advantages of suggested configuration. In this study, the suggested basic and extended topologies have been introduced and the relevant switching scheme has been presented. Then for better evaluation, the suggested basic topology has been compared with similar topologies and simulated in PSCAD/EMTDC software. The comparison and simulation results verify the effectiveness of suggested topology.
一个增强的可扩展的多电平逆变器拓扑与高电平每数量的组件
本文提出了一种增强的基本31电平逆变器拓扑,可以扩展以实现更高的电平。建议的基本拓扑由4个输入直流电源和12个电源开关组成。直流电源的幅值以二值方式选择,以最小化冗余状态和最大化不同电压电平的数量。模块化和简单的结构,开关上的平均电压应力低,适合于电阻-电感负载类型以及每个器件计数(直流输入源,电源开关和栅极驱动电路)的增加水平是建议配置的主要优点。在本研究中,介绍了建议的基本拓扑和扩展拓扑,并提出了相关的交换方案。然后,为了更好地评估,将建议的基本拓扑与类似拓扑进行了比较,并在PSCAD/EMTDC软件中进行了仿真。对比和仿真结果验证了所提拓扑的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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