{"title":"Low power class-C VCO using dynamic body biasing","authors":"W. Lai, S. Jang, B. Shih, Yen-Jung Su","doi":"10.1109/ISNE.2017.7968734","DOIUrl":null,"url":null,"abstract":"This article proposes a 3 GHz class-C VCO with dynamic body-biased MOSFET. The dynamic biasing circuit is used to reduce power consumption by switching NMOS from initial class-AB to class-C operation in steady state and this is obtained by switching the body bias of switching transistors to control threshold voltage of switching MOSFET. The dynamic body-biased Class-C VCO is implemented in TSMC 0.18 μm BiCMOS process. The measured phase noise of −119.92dBc/Hz at 1MHz offset frequency from 2.65 GHz carrier while power consuming 2.0mW from a 0.8V supply. Tuning range of VCO is 0.75 GHz, from 2.66 GHz to 3.41 GHz, while the control voltage was tuned from 0V to 2V. The VCO occupies a chip area of 941.22×625.2μm2 and calculated a figure of merit of −185.35 dBc/Hz.","PeriodicalId":195551,"journal":{"name":"2017 6th International Symposium on Next Generation Electronics (ISNE)","volume":"30 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 6th International Symposium on Next Generation Electronics (ISNE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISNE.2017.7968734","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This article proposes a 3 GHz class-C VCO with dynamic body-biased MOSFET. The dynamic biasing circuit is used to reduce power consumption by switching NMOS from initial class-AB to class-C operation in steady state and this is obtained by switching the body bias of switching transistors to control threshold voltage of switching MOSFET. The dynamic body-biased Class-C VCO is implemented in TSMC 0.18 μm BiCMOS process. The measured phase noise of −119.92dBc/Hz at 1MHz offset frequency from 2.65 GHz carrier while power consuming 2.0mW from a 0.8V supply. Tuning range of VCO is 0.75 GHz, from 2.66 GHz to 3.41 GHz, while the control voltage was tuned from 0V to 2V. The VCO occupies a chip area of 941.22×625.2μm2 and calculated a figure of merit of −185.35 dBc/Hz.