Crosstalk Test Pattern Generation for Dynamic Programmable Logic Arrays

Abstract

In modern deep sub-micron (DSM) circuits, signal crosstalk can arise between two long parallel wires. Dynamic programmable logic arrays (PLAs) may suffer crosstalk noises that will cause the circuit to malfunction due to charge loss. In this paper, based on the characteristics of dynamic PLA crosstalk noises, we present an automatic test pattern generation (ATPG) method to detect the maximum crosstalk noise for each product line. Experimental results obtained by simulating MCNC PLA benchmark circuits demonstrate the efficiency of the ATPG and method