Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses

J. Gracia, D. Gil, L. J. Saiz, J. Baraza-Calvo, P. Gil
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Abstract

The reduction of transistor size dimensions in new technologies has provoked the apparition of new fault types. In this way, intermittent faults present a great challenge, as they are expected to be more and more common. In this work, the effects of intermittent faults in the behavior of a Fault-Tolerant microprocessor are studied. To carry out this analysis, a VHDL-based fault injection technique based on saboteurs, which allows the injection of complex fault models, has been used. Microprocessor buses have been perturbed as they are critical locations, sensitive to intermittent faults. Thus, a representative and low cost intermittent fault model set is proposed by comparing the impact and the feasibility of different intermittent fault models.
微处理器总线间歇故障的代表性低成本故障模型集的定义
新技术中晶体管尺寸的减小引起了新故障类型的出现。在这种情况下,间歇性故障提出了一个巨大的挑战,因为它们预计将越来越普遍。本文研究了间歇故障对容错微处理器性能的影响。为了进行这种分析,采用了基于破坏者的基于vhdl的故障注入技术,该技术允许注入复杂的故障模型。微处理器总线是关键位置,对间歇性故障很敏感,因此受到了干扰。因此,通过比较不同间歇故障模型的影响和可行性,提出了具有代表性的低成本间歇故障模型集。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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