J. Gracia, D. Gil, L. J. Saiz, J. Baraza-Calvo, P. Gil
{"title":"Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses","authors":"J. Gracia, D. Gil, L. J. Saiz, J. Baraza-Calvo, P. Gil","doi":"10.1109/LADC.2013.19","DOIUrl":null,"url":null,"abstract":"The reduction of transistor size dimensions in new technologies has provoked the apparition of new fault types. In this way, intermittent faults present a great challenge, as they are expected to be more and more common. In this work, the effects of intermittent faults in the behavior of a Fault-Tolerant microprocessor are studied. To carry out this analysis, a VHDL-based fault injection technique based on saboteurs, which allows the injection of complex fault models, has been used. Microprocessor buses have been perturbed as they are critical locations, sensitive to intermittent faults. Thus, a representative and low cost intermittent fault model set is proposed by comparing the impact and the feasibility of different intermittent fault models.","PeriodicalId":243515,"journal":{"name":"2013 Sixth Latin-American Symposium on Dependable Computing","volume":"221 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Sixth Latin-American Symposium on Dependable Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LADC.2013.19","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The reduction of transistor size dimensions in new technologies has provoked the apparition of new fault types. In this way, intermittent faults present a great challenge, as they are expected to be more and more common. In this work, the effects of intermittent faults in the behavior of a Fault-Tolerant microprocessor are studied. To carry out this analysis, a VHDL-based fault injection technique based on saboteurs, which allows the injection of complex fault models, has been used. Microprocessor buses have been perturbed as they are critical locations, sensitive to intermittent faults. Thus, a representative and low cost intermittent fault model set is proposed by comparing the impact and the feasibility of different intermittent fault models.