Flip Flop Weighting: A technique for estimation of safety metrics in Automotive Designs

Abstract

The requirements of ISO26262 for the development of safety-critical Integrated Circuits (IC) demand substantial efforts on fault analysis for safety metrics evaluation. Failing to achieve the required conditions entails modifications to the circuit, additional iterations through critical design phases, and consequently extra costs and delays. For that reason, providing accurate methods to estimate safety metrics is of great importance. This paper proposes a methodology that can efficiently and precisely estimate the safety metrics of Automotive designs. The technique is based on the characterization of a netlist to determine how hardware components contribute to fault propagation. Also, by examining the test stimuli applied during simulation, we can rank Workloads/Testbenches according to their fault detection coverage. The approach was verified running fault injection campaigns on distinct gate-level hardware designs, including an Automotive CPU. Our results show that the fault detection coverage can be estimated with an average error rate of 3% at up to 20X faster execution times when compared to the traditional campaigns. Hence the methodology provides an efficient and cost-effective mechanism to support engineers in a confident design space exploration.