{"title":"Precise width control of single crystalline silicon nano-wall structure based on wet etching process on (111) wafer","authors":"Xiao Yu, Q. Jin, Tie Li, Yuelin Wang","doi":"10.1109/NEMS.2012.6196774","DOIUrl":null,"url":null,"abstract":"This paper reports a novel method for precise width control of single crystalline silicon nano-wall structures using conventional top-down micro-fabrication techniques on (111) wafers. Nano-scaled walls with perfect silicon lattices on the surface were fabricated by wet etching process. The width can be controlled at the highest resolution of 80 nm when rotating the wafer by each step of 0.5 degree in alignment, achieving to fabricate silicon walls of the width as low as 134 nm by a micron level lithography mask. These nano-wall structures can be further used to fabricate high-quality silicon-nano-wires (SiNWs) with self-limiting oxidation process.","PeriodicalId":156839,"journal":{"name":"2012 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS)","volume":"17 10","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 7th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEMS.2012.6196774","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper reports a novel method for precise width control of single crystalline silicon nano-wall structures using conventional top-down micro-fabrication techniques on (111) wafers. Nano-scaled walls with perfect silicon lattices on the surface were fabricated by wet etching process. The width can be controlled at the highest resolution of 80 nm when rotating the wafer by each step of 0.5 degree in alignment, achieving to fabricate silicon walls of the width as low as 134 nm by a micron level lithography mask. These nano-wall structures can be further used to fabricate high-quality silicon-nano-wires (SiNWs) with self-limiting oxidation process.