Design and Implementation of FinFET 12-T SRAM cell for low power Applications

Abstract

The technology is advancing in low-power applications, and leakage power is the most obvious issue for memories like SRAM cells. Since they have low power dissipation and high consistency requirements, SRAM cells are a crucial component of modern SoCs, portable electronics, and microprocessors. This paper examined the pros and cons of the various SRAM cell architectures used in FinFET. A novel 14 nm FinFET 12T SRAM cell for low leakage power and high stability has been proposed. The proposed design is compared to a CMOS 12T SRAM cell with the technology of 90 nm and 45 nm. We also investigated the leakage power, total power, temperature variations, and SNM. The proposed design attained a low leakage power of 95.1 pw and total power dissipation of 1.69 nW as compared to the 12T CMOS designs. However, the proposed cell achieves a higher SNM when compared to SRAM using CMOS. This proves that the proposed design is stable to accommodate low-power applications.