A Compact Model for Electro-Thermal Co-Simulation of One Diode-One Resistor Random Access Resistive Memory

Abstract

A Verilog-A compact model for electro-thermal co-simulation of one diode-one resistor (1D1R) resistive random access memory (RRAM) is developed. The compact model contains two parts. One part is the electrical circuit model for the RRAM and the diode with temperature-dependent parameters; the other part is the equivalent thermal circuit model with thermal resistance and thermal capacitance calculated from the geometry and material parameters of 1D1R cell. The electro-thermal compact model can capture both the IV characteristics and temperature distribution of the memory cell. The simulation results reveal that the rising temperature of conductive filament in RRAM is much higher than that of the diode during the reset process of the memory cell. The validity of our compact model is verified by comparing it with other’s experiment data.