{"title":"A detailed review on Double Gate and Triple Gate Tunnel Field Effect Transistors","authors":"A. S. Geege, N. Armugam, P. Vimala, T. Samuel","doi":"10.1109/ICDCS48716.2020.243606","DOIUrl":null,"url":null,"abstract":"In the last three decades, Scaling of complementary metal-oxide semiconductor (CMOS) technology been gateway to continual development in the silicone basis semiconductor industry. Nevertheless, as technology scaling reaches the nanometer system, CMOS devices face many serious issues such as enhanced leakage currents, on-current difficulties, large variations in parameters, poor reliability and yield, higher manufacturing costs, and so on. The Tunnel field-effect transistor (TFET) suggested as a most propitious option compared to CMOS devices. TFET is suitable because of its steep slope possibilities and the corresponding benefits in functioning at limited supply voltage. In this paper, we explored different interface structures related to the Double Gate TFET(DG-TFET) and Triple Gate TFET(TG-TFET).","PeriodicalId":307218,"journal":{"name":"2020 5th International Conference on Devices, Circuits and Systems (ICDCS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 5th International Conference on Devices, Circuits and Systems (ICDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDCS48716.2020.243606","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In the last three decades, Scaling of complementary metal-oxide semiconductor (CMOS) technology been gateway to continual development in the silicone basis semiconductor industry. Nevertheless, as technology scaling reaches the nanometer system, CMOS devices face many serious issues such as enhanced leakage currents, on-current difficulties, large variations in parameters, poor reliability and yield, higher manufacturing costs, and so on. The Tunnel field-effect transistor (TFET) suggested as a most propitious option compared to CMOS devices. TFET is suitable because of its steep slope possibilities and the corresponding benefits in functioning at limited supply voltage. In this paper, we explored different interface structures related to the Double Gate TFET(DG-TFET) and Triple Gate TFET(TG-TFET).