Grzegorz Kozikowski, Grigorios Papamanousakis, Jinzhe Yang
{"title":"Potential future exposure, modelling and accelerating on GPU and FPGA","authors":"Grzegorz Kozikowski, Grigorios Papamanousakis, Jinzhe Yang","doi":"10.1145/2830556.2830560","DOIUrl":null,"url":null,"abstract":"Counterparty Credit Risk is of top concern among financial institutions, as the over-the-counter derivative market has been growing rapidly for the last two decades. Potential Future Exposure (PFE) provides assessment of the safety of a bank's asset portfolio and its adequacy by evaluating whether it is resilient under severely stressing market movements. This paper proposes a PFE model that fits specific business requirements, as well as a GPU and a FPGA implementation of such model. The FPGA implementation has been optimised in terms of the performance to support a fully pipelined design. Experimental results show that the GPU implementation can achieve up to 25 times speedup over CPU solution, and the FPGA implementation can achieve up to 120 times speedup.","PeriodicalId":254831,"journal":{"name":"Proceedings of the 8th Workshop on High Performance Computational Finance","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 8th Workshop on High Performance Computational Finance","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2830556.2830560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Counterparty Credit Risk is of top concern among financial institutions, as the over-the-counter derivative market has been growing rapidly for the last two decades. Potential Future Exposure (PFE) provides assessment of the safety of a bank's asset portfolio and its adequacy by evaluating whether it is resilient under severely stressing market movements. This paper proposes a PFE model that fits specific business requirements, as well as a GPU and a FPGA implementation of such model. The FPGA implementation has been optimised in terms of the performance to support a fully pipelined design. Experimental results show that the GPU implementation can achieve up to 25 times speedup over CPU solution, and the FPGA implementation can achieve up to 120 times speedup.