Reverse Engineering the Stream Prefetcher for Profit

Aditya Rohan, Biswabandan Panda, Prakhar Agarwal
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引用次数: 9

Abstract

Micro-architectural attacks exploit timing channels at different micro-architecture units. Some of the micro-architecture units like cache automatically provide the timing difference (the difference between a hit and a miss). However, there are other units that are not documented, and their influence on the timing difference is not fully understood. One such micro-architecture unit is an L2 hardware prefetcher named Streamer. In this paper, we reverse-engineer the Stream prefetcher, which is commercially available in the Intel machines. We perform a set of experiments and provide our observations and insights. Further, we use these observations to construct a cross-thread covert channel using the Stream prefetcher, with an accuracy of 91.3% and a bandwidth of 54.44 KBps.
逆向工程流预取器获利
微体系结构攻击利用不同微体系结构单元上的定时通道。有些微架构单元,比如缓存,会自动提供时间差(命中和未命中之间的时间差)。然而,还有其他单位没有记录在案,它们对时间差的影响还没有完全了解。其中一个这样的微体系结构单元是名为Streamer的L2硬件预取器。在本文中,我们对流预取器进行了逆向工程,该预取器在英特尔机器上是商用的。我们进行一系列实验,并提供我们的观察和见解。此外,我们利用这些观察结果构建了一个使用流预取器的跨线程隐蔽通道,准确率为91.3%,带宽为54.44 KBps。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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