Logic simulation on the MARS multicomputer

P. Agrawal, Chong Hoc Hao, M. Remillard
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引用次数: 2

Abstract

Design verification of large VLSI (very-large-scale integration) circuits accounts for a sizable part of design time. Simulators verify the design at various levels of abstraction. A fast and accurate simulator enables the designer to introduce a higher quality product into the marketplace early. This paper describes a logic simulator implemented using the MARS (Microprogrammable Accelerator for Rapid Simulations) multicomputer. The logic simulator, AGSIM (Accelerated Good Circuit Simulator), has been integrated into the production CAD (computer-aided design) system at AT&T Bell Laboratories. To date, more than 200 application-specific integrated circuits (ASICs) of varying complexity have been simulated with MARS. This paper presents the relevant features of the MARS architecture, and the details of the logic simulator. We present the results on 10 VLSI ASIC simulations to show its increased performance over the existing software simulator, GSIM (Good Circuit Simulator), while maintaining the same accuracy. The MARS project started with accelerated logic simulation as the primary application. However, the programmable nature of the accelerator has made several other applications possible.
MARS多机逻辑仿真
大型VLSI(超大规模集成电路)电路的设计验证占设计时间的相当一部分。模拟器在不同的抽象层次上验证设计。一个快速和准确的模拟器使设计人员能够尽早向市场推出更高质量的产品。本文介绍了一种利用MARS (Microprogrammable Accelerator for Rapid Simulations)多计算机实现的逻辑模拟器。逻辑模拟器AGSIM(加速良好电路模拟器)已经集成到AT&T贝尔实验室的生产CAD(计算机辅助设计)系统中。迄今为止,已有超过200种不同复杂性的专用集成电路(asic)被MARS模拟。本文介绍了MARS体系结构的相关特点,以及逻辑模拟器的详细设计。我们展示了10个VLSI ASIC模拟的结果,以显示其比现有软件模拟器GSIM (Good Circuit simulator)的性能有所提高,同时保持相同的精度。MARS项目以加速逻辑仿真作为主要应用开始。然而,加速器的可编程特性使其他几个应用成为可能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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