ECC management with rate compatible LDPC code for NAND flash storage: work-in-progress

Jae-Bin Lee, Geon-Myeong Kim, Seungho Lim
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引用次数: 0

Abstract

The NAND flash memory has rapidly increased in storage capacity per unit area, and the rate of occurrence of errors per P/E cycle is also rapidly increasing accordingly. ECC modules such as LDPC have been added to flash controller for recovering from the errors. However, the system designs to increase the lifetime of the flash memory storage device are still in great demand. In this paper, we design the LDPC encoding and decoding scheme to get stepwise code rate according to the P/E cycle by applying rate-compatible LDPC, as well as the management scheme of excessive parity data. Through this, we can improve the error recovery rate of flash memory storage system and extend the lifetime of NAND flash storage system while reducing the system read and write overhead due to the increase in additional parity data.
用于NAND闪存存储的具有速率兼容LDPC代码的ECC管理:正在进行中
随着NAND闪存单位面积存储容量的迅速增加,每P/E周期的出错率也在迅速增加。flash控制器中增加了LDPC等ECC模块,用于错误恢复。然而,提高闪存存储设备寿命的系统设计仍有很大的需求。本文采用兼容码率的LDPC设计了LDPC编解码方案,根据P/E周期逐步得到码率,并设计了过多奇偶数据的管理方案。通过这种方法,可以提高闪存存储系统的错误恢复率,延长NAND闪存存储系统的使用寿命,同时减少由于额外奇偶校验数据的增加而造成的系统读写开销。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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