Tian Jian-zhong, Qiu Qinglin, Ba Feng, Rong Jinye, Zhan Yongxiang
{"title":"Study and design on high reliability mass capacity memory","authors":"Tian Jian-zhong, Qiu Qinglin, Ba Feng, Rong Jinye, Zhan Yongxiang","doi":"10.1109/ICSESS.2010.5552455","DOIUrl":null,"url":null,"abstract":"With the characters of deep storage destiny and high storage speed, the mass capacity memory based on NAND FLASH is widely used in space storage fields. However, due to a variety of condition constrain and bad blocks can be produced, so the reliability of mass capacity storage can not be assured especially in severe environment. A new design plan is proposed to realize the high reliability mass capacity memory. The core technology are triplication redundancy reading and writing of key data through SRAM, warm standby of FLASH arrays, checking of data playback and reasonable bad block management.","PeriodicalId":264630,"journal":{"name":"2010 IEEE International Conference on Software Engineering and Service Sciences","volume":"112 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Conference on Software Engineering and Service Sciences","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSESS.2010.5552455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
With the characters of deep storage destiny and high storage speed, the mass capacity memory based on NAND FLASH is widely used in space storage fields. However, due to a variety of condition constrain and bad blocks can be produced, so the reliability of mass capacity storage can not be assured especially in severe environment. A new design plan is proposed to realize the high reliability mass capacity memory. The core technology are triplication redundancy reading and writing of key data through SRAM, warm standby of FLASH arrays, checking of data playback and reasonable bad block management.