{"title":"Exploiting advanced fault localization methods for yield & reliability learning on SoCs","authors":"D. Appello","doi":"10.1109/VDAT.2009.5158124","DOIUrl":null,"url":null,"abstract":"This paper proposes advances on fault localization methods suiting the learning of yield and reliability in VLSI cmos technologies. Industrial methodologies and tools will be discussed and the experimental results obtained through their implementation will be presented.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158124","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper proposes advances on fault localization methods suiting the learning of yield and reliability in VLSI cmos technologies. Industrial methodologies and tools will be discussed and the experimental results obtained through their implementation will be presented.