Comparative analysis of the CMOS 180nm technology-based flash ADC designs using dynamic comparator and TIQ comparator

Abstract

Flash ADC is the device popularly used in high speed data processing wireless communication systems. The submicron area overhead and the power dissipation of the flash ADC are the important metric parameters in such a high speed applications. Comparator is a major block that increase the power dissipation and area overhead of the data converter. This paper presents the two different types of Flash ADC structures with performance comparisons. The two structures of the ADC have been designed using dynamic comparators and TIQ comparators respectively. The design structures are simulated using 180nm CMOS technology for area, power and delay analysis.