Towards implementing uncertainty propagation in probabilistic floating-point computation error bounding

Abstract

Reconfigurable microprocessor has the flexibility of allocating the number of bits for floating point number representation. This allows the hardware to manage the trade-off between computational accuracy versus resource utilization. By fine-tuning the precision used in mathematical computation, it is possible to optimize the memory usage, processing speed, power budget, latency, and maximum frequency while using less silicon area in the design. Thus, ignoring this potential will significantly limit the achievable performance. This paper extends the application of uncertainty analysis developed for measurement to the error bound estimation for floating-point computation. The results show that by searching for probabilistic bounds instead of mathematically guaranteed bounds, the tightness of the bounds can be substantially improved compared to the mainstream interval arithmetic and affine arithmetic methods. The proposed method will be useful for the design optimization of digital signal processing or machine intelligence modules that are not sensitive against occasional overflow and underflow.