Ultra-Low Power and High Sensitivity of Joint Clock Gating Based Dual Feedback Edge Triggered Flip Flop for Biomedical Imaging Applications

S. Prema, N. Karthikeyan, S. Karthik
{"title":"Ultra-Low Power and High Sensitivity of Joint Clock Gating Based Dual Feedback Edge Triggered Flip Flop for Biomedical Imaging Applications","authors":"S. Prema, N. Karthikeyan, S. Karthik","doi":"10.1166/jmihi.2021.3919","DOIUrl":null,"url":null,"abstract":"To adapt to varied working situations, the latest biomedical imaging applications require low energy consumption, high performance, and extensive energy-performance scalability. State-of-the-art electronics with higher sensitivity, higher counting rate, and finer time resolution are\n required to create higher precision, higher temporal resolution, and maximum contrast biomedical images. In recent days, the system’s power consumption is important critically in modern VLSI circuits particularly for the low power application. In order to decrease the power, a power\n optimization technique must be used at various design levels. The low power use of logic cells is a proficient technique for decreasing the circuit level power. Dual Feedback edge triggered Flip Flop (DFETFF) is considered for biomedical imaging applications in the proposed system. Initially,\n the high dynamic range voltage is given as input signal. The comparator output is then retried at the comparator end. The integration capacitor is employed for storing remaining voltage signal. The comparator voltage is then given to the capacitor reset block. In the proposed work, a capacitor-reset\n block that employs clock signal takes up a dual-feedbackedge-triggered Flip-flop as an alternative of a conventional type for reducing the final output signals errors. Dual feedback loops assure that feedback loops do not tri-state at the time of SET restoration, a scheme that could lead to\n SEUs in latches if a single delay component and a single feedback loop are used. In digital system, Clock gating is a competent method of lessening the overall consumption of power along with deactivating the clock signal selectively and is useful for controlling the usage of clock signal\n asynchronously in reference to input-signal current. The integration-control (Vint) signal is employed in controlling the integration time. On the termination of integration, the signal level phase is kept, also similar one is send to arrangement all through read period. As a result,\n the simulation was carried out after the design layout and the estimations of performance were made and are compared with traditional approaches to prove the proposed mechanism effectiveness for future biomedical applications.","PeriodicalId":393031,"journal":{"name":"J. Medical Imaging Health Informatics","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"J. Medical Imaging Health Informatics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1166/jmihi.2021.3919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

To adapt to varied working situations, the latest biomedical imaging applications require low energy consumption, high performance, and extensive energy-performance scalability. State-of-the-art electronics with higher sensitivity, higher counting rate, and finer time resolution are required to create higher precision, higher temporal resolution, and maximum contrast biomedical images. In recent days, the system’s power consumption is important critically in modern VLSI circuits particularly for the low power application. In order to decrease the power, a power optimization technique must be used at various design levels. The low power use of logic cells is a proficient technique for decreasing the circuit level power. Dual Feedback edge triggered Flip Flop (DFETFF) is considered for biomedical imaging applications in the proposed system. Initially, the high dynamic range voltage is given as input signal. The comparator output is then retried at the comparator end. The integration capacitor is employed for storing remaining voltage signal. The comparator voltage is then given to the capacitor reset block. In the proposed work, a capacitor-reset block that employs clock signal takes up a dual-feedbackedge-triggered Flip-flop as an alternative of a conventional type for reducing the final output signals errors. Dual feedback loops assure that feedback loops do not tri-state at the time of SET restoration, a scheme that could lead to SEUs in latches if a single delay component and a single feedback loop are used. In digital system, Clock gating is a competent method of lessening the overall consumption of power along with deactivating the clock signal selectively and is useful for controlling the usage of clock signal asynchronously in reference to input-signal current. The integration-control (Vint) signal is employed in controlling the integration time. On the termination of integration, the signal level phase is kept, also similar one is send to arrangement all through read period. As a result, the simulation was carried out after the design layout and the estimations of performance were made and are compared with traditional approaches to prove the proposed mechanism effectiveness for future biomedical applications.
基于联合时钟门控的超低功耗高灵敏度双反馈边缘触发触发器在生物医学成像中的应用
为了适应不同的工作环境,最新的生物医学成像应用需要低能耗、高性能和广泛的能源性能可扩展性。需要具有更高灵敏度、更高计数率和更精细时间分辨率的最先进电子设备来创建更高精度、更高时间分辨率和最大对比度的生物医学图像。近年来,系统功耗在现代VLSI电路特别是低功耗应用中至关重要。为了降低功耗,必须在各个设计层面采用功耗优化技术。逻辑单元的低功耗使用是降低电路级功率的一种熟练技术。双反馈边缘触发触发器(DFETFF)被认为是生物医学成像系统中的应用。首先,给出高动态范围电压作为输入信号。然后在比较器端重试比较器输出。剩余电压信号采用积分电容存储。然后将比较器电压给予电容器复位块。在提出的工作中,采用时钟信号的电容复位块采用双反馈触发触发器作为传统类型的替代方案,以减少最终输出信号错误。双反馈回路确保反馈回路在SET恢复时不会出现三态,如果使用单个延迟元件和单个反馈回路,则可能导致锁存器中的seu。在数字系统中,时钟门控是一种有效的减少总功耗的方法,同时可以选择性地使时钟信号失活,并且可以根据输入信号电流异步控制时钟信号的使用。积分控制(Vint)信号用于控制积分时间。在积分终止时,信号电平相位保持不变,并在整个读取周期内发送到排列中。在进行了设计布局和性能评估后进行了仿真,并与传统方法进行了比较,以证明所提出的机制对未来生物医学应用的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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