{"title":"Sub 0.1 /spl mu/m SOI MOSFETs with counter doping into uniformly and heavily doped channel region","authors":"K. Suzuki, A. Satoh, T. Sugii","doi":"10.1109/DRC.1995.496228","DOIUrl":null,"url":null,"abstract":"We proposed counter doping into a heavily and uniformly doped channel region of SOI MOSFETs. This enabled us to suppress the short channel effects with proper threshold voltage V/sub th/, and to eliminate parasitic edge or back gate transistors. We derived a model for V/sub th/, as a function of the projected range, R/sub p/ and dose, /spl Phi//sub D/, of the counter doping and showed that V/sub th/ is invariable even when the as-implanted counter doping profile redistributes. Using this technology, we demonstrated a V/sub th/ roll-off free 0.075 /spl mu/m-L/sub Geff/ nMOSFET with low off-state current.","PeriodicalId":326645,"journal":{"name":"1995 53rd Annual Device Research Conference Digest","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 53rd Annual Device Research Conference Digest","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.1995.496228","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
We proposed counter doping into a heavily and uniformly doped channel region of SOI MOSFETs. This enabled us to suppress the short channel effects with proper threshold voltage V/sub th/, and to eliminate parasitic edge or back gate transistors. We derived a model for V/sub th/, as a function of the projected range, R/sub p/ and dose, /spl Phi//sub D/, of the counter doping and showed that V/sub th/ is invariable even when the as-implanted counter doping profile redistributes. Using this technology, we demonstrated a V/sub th/ roll-off free 0.075 /spl mu/m-L/sub Geff/ nMOSFET with low off-state current.