3-Layer stacked pixel-parallel CMOS image sensors using hybrid bonding of SOI wafers

Abstract

We report 3-layer stacked pixel-parallel CMOS image sensors developed for the first time. The hybrid bonding of silicon-on-insulator wafers through damascened Au electrodes in a SiO 2 insulator on the front and backside realizes both face-to-face and face-to-back bonding, developing a multi-layer stacked device. A 3-layered pixel circuit is developed to confirm the linear response of 16-bit digital signal output. A prototype sensor with 160  120 pixels successfully captures video images, demonstrating the feasibility of multi-layered sensors of high performance as well as multi-functions including signal processing, memory, and computing for applications such as high-quality video cameras, measurements, recognition, robots, and various IoT devices.