S. Chauhan, Akash Bahetra, Layak Singh Yadav, A. Chandan
{"title":"Ultra Low Power High Gain High Speed OTA","authors":"S. Chauhan, Akash Bahetra, Layak Singh Yadav, A. Chandan","doi":"10.1109/CICT48419.2019.9066189","DOIUrl":null,"url":null,"abstract":"In this paper, we present a push-pull Inverter based fully differential operational trans-conductance amplifier (OTA) working at 1V power supply with reduced power consumption and high speed performance. Authors have used a modified feed-forward compensated technique to achieve high DC gain and minimum power consumption. The circuit is simulated in standard CMOS 180nm technology. Simulation results obtained are as follows: 57.87dB of DC gain and 82°of phase margin with Unity Gain Bandwidth (UGB) of 4.32MHz for a capacitive load of 0.01pf, a slew rate of 14.13V/μsec and settling time of 93.17nsec have been achieved. The proposed design shows average power consumption of 253.3nWatt. Simulation results are same after post layout simulation. The maximum propagation delay calculated with parasitic capacitances is 65.68nsec. Along with 180nm technology the same OTA has been simulated on 90nm and 45nm technology and a comparative study by analyzing performance in all three technologies have been presented by the authors.","PeriodicalId":234540,"journal":{"name":"2019 IEEE Conference on Information and Communication Technology","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Conference on Information and Communication Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICT48419.2019.9066189","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we present a push-pull Inverter based fully differential operational trans-conductance amplifier (OTA) working at 1V power supply with reduced power consumption and high speed performance. Authors have used a modified feed-forward compensated technique to achieve high DC gain and minimum power consumption. The circuit is simulated in standard CMOS 180nm technology. Simulation results obtained are as follows: 57.87dB of DC gain and 82°of phase margin with Unity Gain Bandwidth (UGB) of 4.32MHz for a capacitive load of 0.01pf, a slew rate of 14.13V/μsec and settling time of 93.17nsec have been achieved. The proposed design shows average power consumption of 253.3nWatt. Simulation results are same after post layout simulation. The maximum propagation delay calculated with parasitic capacitances is 65.68nsec. Along with 180nm technology the same OTA has been simulated on 90nm and 45nm technology and a comparative study by analyzing performance in all three technologies have been presented by the authors.