High-Performance Wideband 0.25 μm GaAs pHEMT 6-Bit Digital Phase Shifter Design for C-Band Phased Array Applications

Orkun Altay Genç, Adnan Gündel, M. B. Yelten
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Abstract

In this paper, a 6-bit digital phase shifter design is introduced for C-band phased array applications, which presents a high performance in a wide bandwidth between 4 GHz and 6 GHz. The design is performed using the process design kit for 0.25 μm Gallium Arsenide pHEMT applications by WinSemi foundry. For each bit, the optimal design topology is selected and revised with enhancements so that the phase shifter attains a phase shift response, high input/output return loss, and low insertion loss characteristics in a comparatively compact form. The step size for the digital phase shifter is 5.625° with a phase error of 2.8125° in each bit design, tracking the whole 360°. The overall input and output return losses are greater than 10 dB, and the insertion loss of the component is lower than 5.8 dB over the 4–6 GHz bandwidth. This successful performance is achieved within a chip area of only 2200 μm to 2200 μm. Embedded switch all-pass networks and switched high-pass/low-pass network topologies are employed and controlled in parallel within the design. Each bit topology, along with the element values, is optimized and validated for the best performance.
用于c波段相控阵应用的高性能宽带0.25 μm GaAs pHEMT 6位数字移相器设计
本文介绍了一种适用于c波段相控阵的6位数字移相器设计,该移相器在4 GHz ~ 6 GHz宽带范围内具有较高的性能。该设计是使用WinSemi的0.25 μm砷化镓pHEMT工艺设计套件进行的。对于每个位,选择最佳设计拓扑并进行改进,使移相器以相对紧凑的形式获得相移响应、高输入/输出回波损耗和低插入损耗特性。数字移相器的步长为5.625°,每个位的相位误差为2.8125°,跟踪整个360°。在4 ~ 6ghz带宽范围内,器件的整体输入输出回波损耗大于10db,插入损耗小于5.8 dB。该性能仅在2200 μm ~ 2200 μm的芯片面积内实现。嵌入式交换机全通网络和交换高通/低通网络拓扑在设计中被并行使用和控制。每个位拓扑以及元素值都经过优化和验证,以获得最佳性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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