{"title":"Defining a process for rapid processor selection and algorithm development","authors":"N. Dahnoun, J. Brand","doi":"10.1109/WOSSPA.2011.5931467","DOIUrl":null,"url":null,"abstract":"The digital world is undoubtedly upon us. With so many ground breaking digital technologies in the consumer space, from iPads to 3-D TV's, it is clear that innovation is the key to success in today's market. Some might say, more important than innovation is the ability to take an idea from concept to prototype and from prototype to production in a timely manner, ideally less than two years. As Moore's Law continues to hold true, the window of opportunity to get a product to market is shrinking and engineers need to be smarter about their processor selection. Cost is not always the key to success. Software portability is increasingly important, coupled with familiarity of tools and development environment. With these thoughts in mind, the following paper addresses the engineering need to rapidly prototype key algorithms across a selection of processor architectures (ARM, DSP, System-on-Chip (SoC)), using standard benchmarking techniques in a familiar IDE.","PeriodicalId":343415,"journal":{"name":"International Workshop on Systems, Signal Processing and their Applications, WOSSPA","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-05-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Workshop on Systems, Signal Processing and their Applications, WOSSPA","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WOSSPA.2011.5931467","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The digital world is undoubtedly upon us. With so many ground breaking digital technologies in the consumer space, from iPads to 3-D TV's, it is clear that innovation is the key to success in today's market. Some might say, more important than innovation is the ability to take an idea from concept to prototype and from prototype to production in a timely manner, ideally less than two years. As Moore's Law continues to hold true, the window of opportunity to get a product to market is shrinking and engineers need to be smarter about their processor selection. Cost is not always the key to success. Software portability is increasingly important, coupled with familiarity of tools and development environment. With these thoughts in mind, the following paper addresses the engineering need to rapidly prototype key algorithms across a selection of processor architectures (ARM, DSP, System-on-Chip (SoC)), using standard benchmarking techniques in a familiar IDE.