Sara Alonso, Jesús Lázaro, J. Jiménez, L. Muguira, Alejandro Largacha
{"title":"Analysing the interference of Xen hypervisor in the network speed","authors":"Sara Alonso, Jesús Lázaro, J. Jiménez, L. Muguira, Alejandro Largacha","doi":"10.1109/DCIS51330.2020.9268648","DOIUrl":null,"url":null,"abstract":"The use of hypervisors is constantly growing on account of their benefits. For some applications with hard realtime constraints, it is interesting to analyze the speed reduction that could cause. MPSoC boards are suitable for the use of hypervisors thanks to having an FPGA which allows the user to design the hardware and Cortex A53 cores, with armv8 architecture, which have virtualization extensions. The board has been validated with Xen hypervisor. This paper compares five scenarios to characterize the impact of the hypervisor layer on the speed of a network connection: a standalone application, Petalinux directly running on hardware, Petalinux running in Xen Dom0, Petalinux running in Xen DomU paravirtualizing the network and a Petalinux running in Xen DomU pass-throughing the network. It also characterizes the delay of the network connection in some scenarios as a complementary measurement. All the cases are implemented in the Zynq ZCU102 board. It is shown that a Xen hypervisor layer creates a considerable reduction in network speed. Provided that the network is settled down in passthrough mode, the network speed in DomU is almost the same as if there was no hypervisor.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCIS51330.2020.9268648","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
The use of hypervisors is constantly growing on account of their benefits. For some applications with hard realtime constraints, it is interesting to analyze the speed reduction that could cause. MPSoC boards are suitable for the use of hypervisors thanks to having an FPGA which allows the user to design the hardware and Cortex A53 cores, with armv8 architecture, which have virtualization extensions. The board has been validated with Xen hypervisor. This paper compares five scenarios to characterize the impact of the hypervisor layer on the speed of a network connection: a standalone application, Petalinux directly running on hardware, Petalinux running in Xen Dom0, Petalinux running in Xen DomU paravirtualizing the network and a Petalinux running in Xen DomU pass-throughing the network. It also characterizes the delay of the network connection in some scenarios as a complementary measurement. All the cases are implemented in the Zynq ZCU102 board. It is shown that a Xen hypervisor layer creates a considerable reduction in network speed. Provided that the network is settled down in passthrough mode, the network speed in DomU is almost the same as if there was no hypervisor.