A Half-Micron Gate Low Noise GaAs MESFET and Amplifiers

H. Kodera, Y. Kaneko, H. Sato
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引用次数: 1

Abstract

A half-micron gate GaAs MESFET is designed and fabricated for the minimum gate parasitics. The single bonding-pad design of the gate and intentional side-etching of the lower layer of the double-layered Schottky-gate satisfy the above requirement. The best noise figure so far measured is 2.5 dB at 10 GHz for the packaged device and 2.1 dB at 12 GHz for the chip device. An X-band unit amplifier is designed for the FET chip. It can be cascaded to get a specified power gain or modified to have a necessary bandwidth.
半微米栅极低噪声GaAs MESFET及放大器
设计并制作了半微米栅极GaAs MESFET,使栅寄生最小。栅极的单键合板设计和双层肖特基栅极下层的有意侧蚀刻满足了上述要求。迄今为止测量到的最佳噪声系数为封装器件在10 GHz时为2.5 dB,芯片器件在12 GHz时为2.1 dB。为FET芯片设计了x波段单元放大器。它可以级联以获得指定的功率增益或修改以具有必要的带宽。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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