Pareto Rank Surrogate Model for Hardware-aware Neural Architecture Search

Hadjer Benmeziane, S. Niar, Hamza Ouarnoughi, Kaoutar El Maghraoui
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引用次数: 5

Abstract

Hardware-aware Neural Architecture Search (HWNAS) has recently gained much attention by automating the design of efficient deep learning models with tiny resources and reduced inference time requirements. However, HW-NAS inherits and exacerbates the expensive computational complexity of general NAS due to its significantly increased search spaces and more complex NAS evaluation component. To speed up HWNAS, existing efforts use surrogate models to predict a neural architecture’s accuracy and hardware performance on a specific platform. Thereby reducing the expensive training process and significantly reducing search time. We show that using multiple surrogate models to estimate the different objectives does not achieve the true Pareto front. Therefore, we propose HW-PRNAS, a novel Pareto Rank-preserving surrogate model. HWPR-NAS training is based on a new loss function that ranks the architectures according to their Pareto front. We evaluate our approach on seven different hardware platforms, including ASIC, FPGA, GPU and multi-cores. Our results show that we can achieve up to 2. 5x speedup while achieving better Pareto-front results than state of the art surrogate models.
基于Pareto秩代理模型的硬件感知神经结构搜索
基于硬件感知的神经结构搜索(HWNAS)近年来因其能够以较少的资源和较少的推理时间自动设计高效的深度学习模型而受到广泛关注。然而,HW-NAS继承并加剧了常规NAS昂贵的计算复杂度,因为它显著增加了搜索空间和更复杂的NAS评估组件。为了加快HWNAS的速度,现有的研究使用代理模型来预测特定平台上神经架构的准确性和硬件性能。从而减少了昂贵的训练过程,并显著减少了搜索时间。我们表明,使用多个代理模型来估计不同的目标并不能达到真正的帕累托前沿。因此,我们提出了一种新的Pareto秩保持代理模型HW-PRNAS。HWPR-NAS训练基于一个新的损失函数,该函数根据它们的帕累托前沿对体系结构进行排名。我们在七种不同的硬件平台上评估了我们的方法,包括ASIC, FPGA, GPU和多核。我们的结果表明,我们可以达到2。5倍的加速,同时获得比最先进的代理模型更好的Pareto-front结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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