A 90-V subscriber line interface circuit (SLIC) in a CMOS technology

Abstract

A fully CMOS line interface circuit has been developed as an interface to the subscriber line. This design has been done in a 90-V 1/spl mu/m CMOS process and performs high voltage functions of an electrical central office subscriber line interface circuit without any transformer and trimming. This design overcomes challenges of SLIC integration such as accurate current sensing, stability on load variation, longitudinal balance and it works on the harsh telephone environments. The proposed SLIC shows a longitudinal balance of 49 dB while consumes 2.2 mA current with 14 mm/sup 2/ area and the results are significant compared with last works.