17.5 A 98.2%-Efficiency Reciprocal Direct Charge Recycling Inductor-First DC-DC Converter

Abstract

Inductive DC-DC converters are fundamentally limited by the trade-off between conduction losses and switching losses. Miniaturized converters used in applications such as mobile devices suffer badly from this trade off, as a small inductor has a large DCR, which contributes large I2 RDCR conduction losses, while a small inductance desires high frequency operation, which implies high CGATE V2 f hard charging switching losses from the power MOSFET gate drivers. Interestingly, the rise/fall time of such drivers cannot be too rapid, regardless of switching frequency, due to inductive ringing causing potential voltage stresses [1], [2]. To ease the conduction/switching loss trade-off, it is possible to exploit the requirement for finite rise/fall time by replacing conventionally hard-switching gate drivers with adiabatic charge-recycling (CR) gate drivers. As depicted in Fig. 17.5.1 (top right), CR can, through the help of inductor LR, recycle the charge stored on CGATE to another capacitance, CSTORE (and vice-versa), theoretically with 100% efficiency. This approach was demonstrated in [3], where the charge on the power MOSFET gates are recycled to two auxiliary capacitors through two separate inductors (Fig. 17.5.1, top left). However, besides the overhead of two inductors, recycling with separate storage capacitors introduces indirect losses, while the separated duty-cycled resonate gate drivers makes non-overlap timing control between power MOSFETs difficult. By AC-coupling the power NMOS to the resonant gate driver as in [4] (Fig. 17.5.1, bottom left), it is possible to reduce the number of resonant inductors to 1. However, the non-overlap time cannot be precisely controlled, leading to potentially large overlap losses, and the limited duty-cycle control through driver slope modulation prevents robust regulation across a wide output range.