{"title":"Multi-rate LDPC decoder implementation for china digital television terrestrial broadcasting standard","authors":"Dimin Niu, Kewu Peng, Changyong Pan, Zhixing Yang","doi":"10.1109/ICCCAS.2007.6247588","DOIUrl":null,"url":null,"abstract":"The China national standard of digital television terrestrial broadcasting employs Low-Density Parity-Check (LDPC) codes of three different rates as the inner Forward Error Correction (FEC) Codes. In this paper, according to the structure of the quasi-cyclic LDPC (QC-LDPC) code, an implementation of multi-rate LDPC decoder is proposed using semi-parallel structure, achieving the appropriate balance between decoding throughput and the utilization of hardware resource. Meanwhile, a novel multiplex model of storage space and processing units is proposed to increase the resource efficiency of this decoder, which is much better than that of simple combination of three single-rate decoders. Simulation results demonstrate that this multi-rate decoder's performance under AWGN channel is the same as that of single rate decoders, while it has higher resource utilization efficiency. Therefore it could help reduce the chip size of the decoder greatly. In addition, the multi-rate strategy can also be applied to other QC-LDPC codes.","PeriodicalId":218351,"journal":{"name":"2007 International Conference on Communications, Circuits and Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 International Conference on Communications, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCCAS.2007.6247588","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
The China national standard of digital television terrestrial broadcasting employs Low-Density Parity-Check (LDPC) codes of three different rates as the inner Forward Error Correction (FEC) Codes. In this paper, according to the structure of the quasi-cyclic LDPC (QC-LDPC) code, an implementation of multi-rate LDPC decoder is proposed using semi-parallel structure, achieving the appropriate balance between decoding throughput and the utilization of hardware resource. Meanwhile, a novel multiplex model of storage space and processing units is proposed to increase the resource efficiency of this decoder, which is much better than that of simple combination of three single-rate decoders. Simulation results demonstrate that this multi-rate decoder's performance under AWGN channel is the same as that of single rate decoders, while it has higher resource utilization efficiency. Therefore it could help reduce the chip size of the decoder greatly. In addition, the multi-rate strategy can also be applied to other QC-LDPC codes.