Multi-rate LDPC decoder implementation for china digital television terrestrial broadcasting standard

Dimin Niu, Kewu Peng, Changyong Pan, Zhixing Yang
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引用次数: 8

Abstract

The China national standard of digital television terrestrial broadcasting employs Low-Density Parity-Check (LDPC) codes of three different rates as the inner Forward Error Correction (FEC) Codes. In this paper, according to the structure of the quasi-cyclic LDPC (QC-LDPC) code, an implementation of multi-rate LDPC decoder is proposed using semi-parallel structure, achieving the appropriate balance between decoding throughput and the utilization of hardware resource. Meanwhile, a novel multiplex model of storage space and processing units is proposed to increase the resource efficiency of this decoder, which is much better than that of simple combination of three single-rate decoders. Simulation results demonstrate that this multi-rate decoder's performance under AWGN channel is the same as that of single rate decoders, while it has higher resource utilization efficiency. Therefore it could help reduce the chip size of the decoder greatly. In addition, the multi-rate strategy can also be applied to other QC-LDPC codes.
中国数字电视地面广播标准多速率LDPC解码器的实现
中国数字电视地面广播国家标准采用三种不同速率的低密度校验码(LDPC)作为内部前向纠错码(FEC)。本文根据准循环LDPC (QC-LDPC)码的结构,提出了一种采用半并行结构实现的多速率LDPC译码器,实现了译码吞吐量和硬件资源利用率之间的合理平衡。同时,提出了一种新的存储空间和处理单元的复用模型,提高了该解码器的资源效率,大大优于三个单速率解码器的简单组合。仿真结果表明,该多速率解码器在AWGN信道下的性能与单速率解码器相当,同时具有更高的资源利用效率。因此可以大大减小解码器的芯片尺寸。此外,多码率策略也可应用于其他QC-LDPC规范。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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