2-/spl mu/m, 1.6-mW gated-g/sub m/ sampler with 72 dB SFDR at 160 Ms/s and 320.25-MHz f/sub in/

S. C. Munroe
{"title":"2-/spl mu/m, 1.6-mW gated-g/sub m/ sampler with 72 dB SFDR at 160 Ms/s and 320.25-MHz f/sub in/","authors":"S. C. Munroe","doi":"10.1109/CICC.1997.606586","DOIUrl":null,"url":null,"abstract":"The sampler is often the limitation in determining how early in the signal chain the conversion to discrete time can be done. We have fabricated a high-speed, wideband sampler based upon a charge-domain gated-gm cell that has a measured SFDR of 72 dB at 160 Ms/s and 320.25-MHz input frequency. This performance is achieved at 2% of the power and 4% of the area of a recently-released high-performance but slower sampler. Simulations indicate that far higher performance is possible in a more optimized circuit.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606586","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

The sampler is often the limitation in determining how early in the signal chain the conversion to discrete time can be done. We have fabricated a high-speed, wideband sampler based upon a charge-domain gated-gm cell that has a measured SFDR of 72 dB at 160 Ms/s and 320.25-MHz input frequency. This performance is achieved at 2% of the power and 4% of the area of a recently-released high-performance but slower sampler. Simulations indicate that far higher performance is possible in a more optimized circuit.
2-/spl mu/m, 1.6 mw门控-g/sub /m /采样器,在160 Ms/s和320.25 mhz f/sub / in/下具有72 dB SFDR
采样器通常是决定在信号链中多早的时候进行离散时间转换的限制因素。我们制作了一个基于电荷域门控单元的高速宽带采样器,在160 Ms/s和320.25 mhz输入频率下,测量的SFDR为72 dB。这种性能是在最近发布的高性能但速度较慢的采样器的2%的功率和4%的面积下实现的。仿真表明,在更优化的电路中可以实现更高的性能。
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