Performance optimization of CNFET based subthreshold circuits

Abstract

Subthreshold circuits are an ideal choice for ultra low power, moderate throughput applications. In subthreshold region to meet the ultra-low power requirement of energy constrained devices, supply voltage less than the threshold voltage is applied. At same frequency, subthreshold circuits show orders of magnitude power saving over superthreshold circuits. In subthreshold operating region, minute leakage current is use as switching current but this limit the performance of logic gate. Primary goal while designing the subthreshold circuit is to increase the speed. Carbon Nano Tube Field Effect Transistors (CNFETs) is one of the most promising devices among emerging technologies. Most of the fundamental limitations of traditional MOSFETs are overcome in CNFETs. This paper investigates the performance analysis of subthreshold circuits and shown improvement in speed of logic gates using CNFETs. This paper primarily investigates the characteristics of CNFETs in subthreshold region. Improvement in performance of FO4, 1-bit full adder and 2:1 multiplexer is observed using CNFET over Si-MOSFET in subthreshold. This paper propose that reducing the gate oxide thickness of CNFET increases drive current and hence speeds with almost same amount of power dissipation.