Implementation And Simulation Of Acquisition Consistency For Cache-based Multiprocessors

Abstract

Cache-based shared memory multiprocessing o$ers a cost-eflective solution for most applications by reducing bus contention as well as memory access latency. However, incorporating private caches into shared memory multiprocessors leads to coherence problems. The frequency of the communication between processors may exceed the fundamental requirements of an algorithm due to the memory consistency model. This paper presents a new model of memory consistency called Acquisition Consistency (AC) to reduce the immoderate communication in a cache-based multiprocessor. Other cache consistency models are evaluated; the evaluation indicates that a system with our model has the greatest potential to eliminate the false-sharing. Under the scheme for AC, programmers are not required to explicitly correlate shared data with locks and do not have to insert additional synchronization into programs. Simulation resulis indicate that with little overhead, this scheme significantly reduces the miss rate and the traJgic amount in almost all applications.