{"title":"A vital digital control system with a calculable probability of an unsafe failure","authors":"D. Rutherford","doi":"10.1109/CMPASS.1990.175397","DOIUrl":null,"url":null,"abstract":"The numerically integrated safety assurance logic concept, which allows the closed-form calculation of an upper bound on the probability of an unsafe (i.e., potentially hazardous or wrongside) failure for circumscribed portions of a control system, including CPU, most ancillary digital components and software, is reviewed by describing its implementation in a railroad interlocking controller. The interlocking controller is a Boolean expression evaluation device in which the primordial logic of the interlocking has been stated as a set of expressions. The fail-safe evaluation of the expression set and the subsequent control of the switches and signals by the processor-based controller are discussed. The discussion covers system design objectives, a system description, the vital input and output circuits, vital erasure of buffer data, vital verification of output states, the requirements of the vital power source, data structure generation, verification of data structure integrity, and implications of the system design.<<ETX>>","PeriodicalId":122768,"journal":{"name":"Fifth Annual Conference on Computer Assurance, Systems Integrity, Software Safety and Process Security.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth Annual Conference on Computer Assurance, Systems Integrity, Software Safety and Process Security.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPASS.1990.175397","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The numerically integrated safety assurance logic concept, which allows the closed-form calculation of an upper bound on the probability of an unsafe (i.e., potentially hazardous or wrongside) failure for circumscribed portions of a control system, including CPU, most ancillary digital components and software, is reviewed by describing its implementation in a railroad interlocking controller. The interlocking controller is a Boolean expression evaluation device in which the primordial logic of the interlocking has been stated as a set of expressions. The fail-safe evaluation of the expression set and the subsequent control of the switches and signals by the processor-based controller are discussed. The discussion covers system design objectives, a system description, the vital input and output circuits, vital erasure of buffer data, vital verification of output states, the requirements of the vital power source, data structure generation, verification of data structure integrity, and implications of the system design.<>