A vital digital control system with a calculable probability of an unsafe failure

D. Rutherford
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引用次数: 2

Abstract

The numerically integrated safety assurance logic concept, which allows the closed-form calculation of an upper bound on the probability of an unsafe (i.e., potentially hazardous or wrongside) failure for circumscribed portions of a control system, including CPU, most ancillary digital components and software, is reviewed by describing its implementation in a railroad interlocking controller. The interlocking controller is a Boolean expression evaluation device in which the primordial logic of the interlocking has been stated as a set of expressions. The fail-safe evaluation of the expression set and the subsequent control of the switches and signals by the processor-based controller are discussed. The discussion covers system design objectives, a system description, the vital input and output circuits, vital erasure of buffer data, vital verification of output states, the requirements of the vital power source, data structure generation, verification of data structure integrity, and implications of the system design.<>
具有可计算的不安全故障概率的重要数字控制系统
通过描述其在铁路联锁控制器中的实现,对数字集成安全保证逻辑概念进行了回顾,该概念允许对控制系统的限定部分(包括CPU,大多数辅助数字组件和软件)的不安全(即潜在危险或错误)故障概率的上界进行封闭式计算。联锁控制器是一种布尔表达式求值装置,其中联锁的原始逻辑被表述为一组表达式。讨论了表达式集的故障安全评估以及基于处理器的控制器对开关和信号的后续控制。讨论内容包括系统设计目标、系统描述、重要输入和输出电路、缓冲区数据的重要擦除、输出状态的重要验证、重要电源的要求、数据结构的生成、数据结构完整性的验证以及系统设计的含义
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