Implementation of accurate frame interleaved sampling in a low cost FPGA-based data acquisition system

Abstract

Interleaved sampling is used by major DSO vendors for acquisition of periodic waveforms to increase the equivalent sampling frequency. These instruments use advanced proprietary solutions that are not applicable to low cost instrumentation easily. Accurate frame interleaved sampling becomes applicable when the waveform of interest can be excited at will, and requires these excitations to be delayed by a certain amount in relation to the ADC clock. An implementation of this mode using DCMs readily available in Xilinx FPGAs is described. The developed instrument cost about two orders of magnitude less than the real time DSO used for comparison, but nevertheless provided much better resolution of the acquired pulse responses at the tolerable expense of the increased measurement time.