Design of Octonary Memory Cell using Memristor-MOS Hybrid Structure

Abstract

CMOS Nano/Molecular scale technology is going to the end of its journey soon. The current technology strives for fast speed., high device density., high energy efficient and ease of use. Memristor enabled the development of these types of properties for its non-volatility., size and good switching behavior. In this work., a Memristor-MOS based Octonary memory cell has been proposed that provides 3-bit data or eight different states storage in the single cell. Data erasing technique is used for write operation by eliminating feedback read-based writing operations. Voltage division based read methodology is used for total read write operation and verification of the proposed cell were performed using LTspice simulation.